ASIC Designer (Austin)

Subscribe

Report job

Fulltime position in Austin TX.Any interest? Jeff

KEY RESPONSIBILITIESAs a member of the SoC Design team, you will be responsible for the following:

Microarchitecture of high-performance (low-latency, high-bandwidth, high-frequency), low-power on-chip modules design
The design job includes microarchitecture, design and write the RTL code, connectivity, perform structural checks (such as Lint, CDC) of the modules
Develop and maintain methodology/flows/checks for designs
Work with multi-disciplinary groups to deliver the modules, close the static timing and work with backend engineers to close the timing

JOB REQUIREMENTS

Bachelor's or Master's in EE/CS with 5-15 years experience is required
Design and Verification of multi-million gate ASICs with Verilog or System Verilog
Hands on experience in all aspects of the ASIC development process with proficiency in front-end tools and methodologies
Experience with multiple clock domains and asynchronous interfaces
Experience or knowledge of system architecture, CPU & IP integration, power and clock domains
Ability to communicate effectively across many internal groups
Familiarity with software and operating systems concepts
Computer Architecture concepts
SoC system bfabric/interconnect design verification
Memory controller design verification
Expertise in System Verilog and other high level language like C, C is a must
Should have knowledge of AMBA protocols - AXI, AHB, APB and other Management interfaces
Familiarity with scripting languages such as Perl, Python
Self-starter and highly motivated

Texas